16-channel Logic Analyzer & Digital Pattern Generator Upgrade for Uprog Universal Chip Programmers The RK-Systems Uprog family of universal chip programmers can be upgraded to also function as a 16-channel, 200MHz logic analyzer and digital function generator by purchasing this upgrade package. A small adapter board that plugs into the programmer's socket and connects with 16 test probes is included with this upgrade. Logic Analyzer Main Features: - 16 input channels
- Maximum sampling rate: 200MHz1
- Buffer length: 64K x 16 or 256K x 162
- Short data transfer time
- External clock input
- Flexible trigger settings: edge, level (pattern) or combination of edge and/or pattern
- Pre-trigger and Post-trigger buffer
- Capture delay and edge counter feature
- Input impedance: 470kΩ
- Sampling booster - the area near the Trigger can be sampled with twice the standard sampling rate
- Serial protocol interpreter: RS-232, SPI*, I2C*, CAN*, 1-wire* (* = available soon)
- State machine Analyzer
- Mnemonics code analyzer for microprocessors
- Signal comparison via three independent buffers
- Pattern generator
Ulogic, the logic analyzer option for Uprog programmers, makes the programmer an excellent measurement tool. Simply connect a small adapter board (included with license upgrade) directly to the programmer's socket, run the PC software and enjoy capturing the data. Logic Analyzer Technical Parameters: Sampling rates
200MHz1, 100MHz, 50MHz, 40MHz1, 20MHz, 10MHz, 5MHz, 4MHz1, 2MHz,1MHz, 500kHz, 400kHz1, 200kHz, 100kHz, 50kHz, 40kHz1, 20kHz, 10kHz, 5kHz, 4kHz1, 2kHz, 1kHz, 500Hz, 400Hz1, 200Hz
Digital input
16 channels, maximum input voltage: ±50V
Buffer length
Adjustable size: 16384, 32768, 65536, 1310722, 2621442 samples
Trigger settings
Edge - rising or falling edge
Edge, skip N - edge counter
Pattern - specified pattern
Edge and (or) Pattern - combination of edge and pattern
Force - trigger can be also forced by the user.
Threshold level for digital signals
Supported standards: 5V (TTL), 3.3V, 2.5V, 1.8V
Capture Delay
A capture delay is the delay between trigger occurrence and data acquisition
Pre/Post Trigger buffer
Define how much of the sampling-buffer will be used to store data before the trigger
External clock input
External clock source may be used for sampling. Max. clock frequency 50MHz.
Software
The easy to use and flexible software displays captured data. Any number of channels can be displayed,the name of any channel can be changed. Three cursors are available for time/frequency measurements. Zoom options, jump to cursor buttons and a scrollbar in connection with the cursors make data analysis very easy.
Notes:
- 1:Sampling rate available in limited buffer area (12K samples near cursor T) when Booster is enabled.
- 2:Available after memory expansion.
Optional Digital Pattern Generator the Pattern Generator is part of the optional Ulogic license. With the help of a user friendly pattern editor you can define any sequence of 16 digital signals and apply those signals to a device's digital interface. You can also define the voltage level of the output signals. 
Pattern Generator Main Features: - 16 output channels
- Signal rates from 100MHz (state changes every 10ns) down to 200Hz
- Maximum buffer length: 64K samples (256K with memory upgrade).
- Adjustable buffer length from 1 to maximal length
- Save defined signals for future use
- Available work modes:
- Auto - generation of defined signals,
- Repeat - cyclic generation of signals after trigger
- Single - single generation of signals after trigger
- Adjustable voltage level of output: 1.8V, 2.5V, 3.3V, 5V (TTL).
- User friendly pattern editor.
Software Download:
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