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Logic & Protocol Analyzer, 16 ch.@2Mb, 100Hz-200MHz, USB Power US$1,499.00

LAP-C-162000+
Logic & Protocol Analyzer, 16 ch.@2Mb, 100Hz-200MHz, USB Power


The Zeroplus LAP-C-162000+ "Logic Century" 16-channel, PC-based logic analyzer features powerful protocol analyzer capabilities. The standard package includes 23 protocol analyzer plug-ins. For a limited time you get all 71 other available protocol analyzer plug-ins for free a US$1500 value!

Logic Century has been designed to work with an oscilloscope to enable both analog and digital signals to be captured. The Logic Century incorporates a sophisticated compression algorithm which enables more data to be captured without loss of any information. New features include waveform zoom, data width automatic demonstration mode, fast demonstration full page pattern mode, data comparison demonstration mode, etc.

The Logic Century includes the Data Contrast, Latch Function, Protocol Analyzer Trigger, and Trigger Mark software add-ons free of charge.

The logic analyzer connects to a PC via USB. It supports the full 480Mbps USB 2.0 speed, but also can use 12Mbps USB 1.1. The analyzer is powered from the USB as well.

LAP-C Century Logic Analyzer Features

Items/Type LAP-C-162000+
Interface USB 2.0 (or 1.1)
Operating System Windows 2000 / Windows XP / Windows Vista / Windows 7
Power Power Supply Powered through USB (DC 5V, 500mA)
Idle Consumption 1W
Work Consumption 2W Max.
Channels 16
Sampling Rate Internal Clock (Timing, Asynchronous) 100 Hz to 200 MHz
External Clock (State, Synchronous) 100 MHz
Test Signal Bandwidth 75 MHz (-3 dB)
Trigger Range -6V to +6V
Trigger Resolution 0.1V
Memory RAM Size 64 Mbits
Depth Per Channel 2 Mbits (Max. 512 Mbits for compression)
Trigger Condition Pattern/Edge
Channels 16 Channels
Post-Trigger Yes
Trigger Level 1 Level
Trigger Count 1 to 65535
Software Functions Data Compression Max. 512 Mbits
Time Base Range 5 ps to 10 Ms
Language English, Traditional Chinese, or Simplified Chinese
Maximum Trigger Pages 8192 Pages
Waveform Data Display Yes
Filter & Filter Delay Yes
Trigger Delay Yes
Unlimited Increasing Bar Yes
Automatic Attaching Bar Yes
Automatic Software Upgrade Yes
Data Statistics Yes
Auto-Save Yes
Filter Bar Yes
Protocol Analysis Yes
Protocol Packet List Yes
File Export Yes
Data Contrast Yes
Latch Function Yes
Protocol Packet Trigger Parallel
Pulse Width Trigger Module Optional
Other Phase Errors < 1.5 ns
Max. Input Voltage 30V
Impedance 500 KΩ / 10 pF
Safety Certifications FCC / CE / WEEE / RoHS / SVHC
Extending Channel Capture Not supported
Double Mode Channels 16 Channels
RAM Size 4M

Logic Analyzer Software

The Smart+ software runs on Windows 2000, XP, Vista, and Windows 7. Features include the following:

Data Contrast

This function can compare the waveforms of two LA files and mark the differences with an orange wavy line, allowing you to spot problems quickly.

Memory Analyzer

The Smart+ software can display the packet data decoded by the protocol analyzer module in the memory map mode which is common in the memory. It is mainly used to analyze the read/write status or anomaly of each address in the EEPROM, helping you to handle the memory actions. This function is not only for recording; it also can separately analyze the read and write of each packet, and display the abnormal status of each address in the memory. In this way, you can quickly debug and contrast the data.

Bus Packet List

The Smart+ software can decode the bus very quickly for you to understand. Its particular function Bus Packet List can show the huge packet data in a list, so you can analyze the relative position of packet statuses very quickly. It is very helpful for program checking and observing a drive's initial action.

Boolean Calculation

You only need to click the Boolean Calculation icon and select two channels as the input, then Smart+ will calculate the logic input status and display it in the waveform display area. This can help you to simulate the signal result produced by digital signal calculation in your circuit design. The logic gates supported by the Smart+ include: AND, OR, NAND, NOR, XOR, XNOR, NOT, etc.

Image Encode

Image Encode, a patented function of Zeroplus analyzers, is specially designed for the Bus modules of display type (such as CMOS Image, 7-SEGMENT LED, LCD12864, LCD1602, etc.). After capturing the video digital signal, the Smart+ software can use this function to restore the video signal to image(s). So there is no need to see the full data; you can see the original image directly, to decide if the data are correct or not more quickly. It makes an intuitive and comprehensive new measurement mode.

Latch Function

It can be time consuming trying to trace one particular signal in a pile of complex signals. Use the Latch Function to set one particular signal in the paralleling bus as the sampling site reference for analyzing, so as to filter out some useless signals.

Protocol Analyzer Trigger

The Packet Trigger function of the Protocol Analyzer can be used to help you find the correct position in complex packets. In the case of this function, the options of the Protocol Packet are determined by the different Protocol Analyzers. Take the I2C for an example. When we do the Packet Trigger function for the packets of the I2C Protocol Analyzer, the protocol packets can be selected from the options, such as START, ADDRESS, READ, WRITE, A-ACK, D-ACK, D-NACK, A-NACK, ERROR and STOP. The Value of the Protocol Packet can be entered according to the requirements of the I2C Protocol Analyzer.

Trigger Mark

Display All Packets can shorten the time to find the trigger targets. Used along with Bus Trigger, it can quickly mark the data packets that fit the trigger condition. Up to 128 trigger marks are supported for counting and finding the needed data.

Protocol Analyzers

Download this Excel spreadsheet and view the 162000 column to see the complete list of protocols available for this analyzer. The 23 that are shaded in light green are built in. You will be able to download any or all of the others from the list (those remaining with a white background).

Logic Analyzer Electrical Specifications

Item Min Typical Max
Working Voltage DC 4.5V DC 5V DC 5.5V
Current at Rest 200mA
Current at Work 400mA
Power at Rest 1W
Power at Work 2W
Vinput of Testing Channels -30V DC +30V DC
Vreference -6V DC +6V DC
Impedance 500 KΩ / 10 pF
Working Temperature +5 C +70 C
Storage Temperature -40 C +80 C

Logic Analyzer Package Contents

  • LAP-C(16128+) logic analyzer (135 112.9 30.3 mm)
  • Two 8-channel signal connectors (25 cm)
  • One 2-channel signal connector (25 cm)
  • One single-channel signal connector (25 cm)
  • 20 test hook grips in 10 different colors
  • USB cable
  • Installation guide
  • Driver CD
  • Carrying bag
The included signal connector cables are 25cm in length. A 40cm cable package is available separately.

  • Visit the ZeroPlus Application Notes Page for technical documentation covering a wide range of topics, and to see more details about the differences between the LAP-C models, and how to use the logic/protocol analyzers in different ways.

  • Read customer testimonials of Zeroplus Logic Analyzers.

  • Optional Recommended Products for this Item
    Pulse Width Trigger Module for ZeroPlus Analyzers+ US$129.00
    Protocol Simulator Board 2, Generator of 55 Signals for Testing+ US$85.00
    Protocol Simulator Board 1, Generator of 46 Signals for Testing+ US$85.00
    16-channel signal connector cable set, 40cm+ US$10.00
    32-channel signal connector cable set, 40cm+ US$18.00
    32-channel signal connector cable set, 25cm+ US$15.00
    Probe test hooks for logic analyzers, 36 pieces+ US$35.00
    1000V DC USB Isolator+ US$41.33

    This product was added to our catalog on Tuesday 23 October, 2012.

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