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Digital Systems Design with FPGAs and CPLDs US$98.95

ELV9780750683975
Digital Systems Design with FPGAs and CPLDs

Digital Systems Design with FPGAs and CPLDs Description

By Ian Grout

  • 784 pages 627 ills
  • Trim size 7 1/2 X 9 1/4 in
  • Copyright 2008

This textbook explains how to design and develop digital electronic systems using programmable logic devices (PLDs). Totally practical in nature, the book features numerous (quantify when known) case study designs using a variety of Field Programmable Gate Array (FPGA) and Complex Programmable Logic Devices (CPLD), for a range of applications from control and instrumentation to semiconductor automatic test equipment.

Digital Systems Design with FPGAs and CPLDs Key features include:
  • Case studies that provide a walk through of the design process, highlighting the trade-offs involved.
  • Discussion of real world issues such as choice of device, pin-out, power supply, power supply decoupling, signal integrity- for embedding FPGAs within a PCB based design.
  • With this book engineers will be able to:
  • Use PLD technology to develop digital and mixed signal electronic systems
  • Develop PLD based designs using both schematic capture and VHDL synthesis techniques
  • Interface a PLD to digital and mixed-signal systems
  • Undertake complete design exercises from design concept through to the build and test of PLD based electronic hardware

This book will be ideal for electronic and computer engineering students taking a practical or Lab based course on digital systems development using PLDs and for engineers in industry looking for concrete advice on developing a digital system using a FPGA or CPLD as its core.

Digital Systems Design with FPGAs and CPLDs Key Features

  • Case studies that provide a walk through of the design process, highlighting the trade-offs involved.
  • Discussion of real world issues such as choice of device, pin-out, power supply, power supply decoupling, signal integrity- for embedding FPGAs within a PCB based design.

Digital Systems Design with FPGAs and CPLDs Readership

Electrical and electronic engineering and computer engineering undergraduates and masters students taking a course or lab course in digital systems/digital architecures. Professional electronic engineers using PLDs to build digital systems

Digital Systems Design with FPGAs and CPLDs Contents

test

Chapter 1 Introduction to Programmable Logic

1.1 Introduction to the Book

1.2 Electronic Circuits: Analogue and Digital

1.2.1 Introduction

1.2.2 Continuous-Time Vs Discrete-Time

1.2.3 Analogue Vs Digital

1.3 History of Digital Logic

1.4 Programmable Logic vs Discrete Logic

1.5 Programmable Logic vs Processors

1.6 Types of Programmable Logic

1.6.1 Simple Programmable Logic Device (SPLD)

1.6.2 Complex Programmable Logic Device (CPLD)

1.6.3 Field Programmable Gate Array (FPGA)

1.7 PLD Configuration Technologies

1.8 Programmable Logic Vendors

1.9 Programmable Logic Design Methods and Tools

1.9.1 Introduction

1.9.2 Typical PLD Design Flow

1.10 Technology Trends

1.11 References

1.12 Student Exercises

Chapter 2 Electronic Systems Design

2.1 Introduction

2.2 Sequential Product Development Vs Concurrent Engineering Process

2.2.1 Introduction

2.2.2 Sequential Product Development Process

2.2.3 Concurrent Engineering Process

2.3 Flow Charts

2.4 Block Diagrams

2.5 Gajski-Kuhn Chart

2.6 Hardware-Software Co-Design

2.7 Formal Verification

2.8 Embedded Systems and Real Time Operating Systems

2.9 Electronic Systems Level Design

2.10 Writing a Design Specification

2.11 UML – Unified Modeling Language

2.12 Reading a Component Datasheet

2.13 Digital Input-Output

2.13.1 Introduction

2.13.2 Logic Level Definitions

2.13.3 Noise Margin

2.13.4 Interfacing Logic Families

2.14 Parallel and Serial Interfacing

2.14.1 Introduction

2.14.2 Parallel I/O

2.14.3 Serial I/O

2.15 System Reset

2.16 System Clock

2.17 Power Supplies

2.18 Power Management

2.19 Printed Circuit Boards and Multi-Chip Modules

2.20 System on a Chip and System in a Package

2.21 Mechatronic Systems

2.22 Intellectual Property

2.23 CE and FCC Marking

2.25 References

2.26 Student Exercises

Chapter 3 PCB Design

3.1 Introduction

3.2 What is a PCB?

3.2.1 Definition

3.2.2 Structure of the PCB

3.2.3 Typical Components

3.3 Design, Manufacture and Test

3.3.1 PCB Design

3.3.2 PCB Manufacture

3.3.3 PCB Test

3.4 Environmental Issues

3.4.1 Introduction

3.4.2 WEEE Directive

3.4.3 RoHS Directive

3.4.4 Lead-Free Solder

3.4.5 Electromagnetic Compatibility

3.5 Case Study PCB Designs

3.5.1 Introduction

3.5.2 System Overview

3.5.3 CPLD Development Board

3.5.4 LCD Display and Hex Keypad Board

3.5.5 PC Interface Board

3.5.6 Digital I/O Board

3.5.7 Analogue I/O Board

3.6 Technology Trends

3.7 References

3.8 Student Exercises

Chapter 4 Design Languages

4.1 Introduction

4.2 Software Programming Languages

4.2.1 Introduction

4.2.2 C 4.2.3 C++

4.2.4 JAVATM

4.2.5 Visual BasicTM

4.2.6 Scripting Languages

4.2.7 PHP

4.3 Hardware Description Languages

4.3.1 Introduction

4.3.2 VHDL

4.3.3 Verilog®-HDL

4.3.4 Verilog®-A

4.3.5 VHDL-AMS

4.3.6 Verilog®-AMS

4.4 SPICE

4.5 Mathematical Modelling Tools

4.6 References

Chapter 5 Introduction to Digital Logic Design (Design Principles)

5.1 Introduction

5.2 Number Systems

5.2.1 Introduction

5.2.2 Decimal-Unsigned Binary Conversion

5.2.3 Signed Binary Numbers

5.2.4 Gray Code

5.2.5 Binary Coded Decimal

5.2.6 Octal-Binary Conversion

5.2.7 Hexadecimal-Binary Conversion

5.3 Binary Data Manipulation

5.3.1 Introduction

5.3.2 Logical Operations

5.3.3 Boolean Algebra

5.3.4 Combinational Logic Gates

5.3.5 Truth-Tables

5.4 Combinational Logic Design

5.4.1 Introduction

5.4.2 NAND and NOR Logic

5.4.3 Karnaugh Maps

5.4.4 “Don’t Care” Conditions

5.5 Sequential Logic Design

5.5.1 Introduction

5.5.2 Latches and Bistables

5.5.3 The D-Latch and D-Type Bistable

5.5.4 Counter Design

5.5.5 State Machine Design

5.5.6 Moore Vs Mealy State Machine

5.5.7 Shift Registers

5.5.8 Digital Scan Path

5.6 Memory

5.6.1 Introduction

5.6.2 Random Access Memory

5.6.3 Read Only Memory

5.7 References

5.8 Student Exercises

Chapter 6 Introduction to Digital Logic Design with VHDL

6.1 Introduction 6.2 Designing with HDLs

6.3 Design Entry Methods

6.3.1 Introduction

6.3.2 Schematic Capture

6.3.3 HDL Design Entry

6.4 Logic Synthesis

6.5 Entities, Architectures, Packages and Configurations

6.5.1 Introduction

6.5.2 AND Gate Example

6.5.3 Commenting the Code

6.6 A First Design

6.6.1 Introduction

6.6.2 Dataflow Description Example

6.6.3 Behavioural Description Example

6.6.4 Structural Description Example

6.7 Signals Vs Variables

6.7.1 Introduction

6.7.2 Example – Architecture with Internal Signals

6.7.3 Example – Architecture with Internal Variables

6.8 Generics

6.9 Reserved Words

6.10 Data Types

6.11 Concurrent Vs Sequential Statements

6.12 Loops and Program Control

6.13 Coding Styles for VHDL

6.14 Combinational Logic Design

6.14.1 Introduction

6.14.2 Complex Logic Gates

6.14.3 1-Bit Half Adder

6.14.4 4-to-1 Multiplexer

6.14.5 Thermometer Code to Binary Encoder

6.14.6 Seven Segment Display Driver

6.14.7 Tristate Buffer

6.15 Sequential Logic Design

6.15.1 Introduction

6.15.2 Latches and Bistables

6.15.3 Counter Design

6.15.4 State Machine Design

6.16 Memories

6.16.1 Introduction

6.16.2 Random Access Memory

6.16.3 Read Only Memory

6.17 Unsigned Vs Signed Arithmetic

6.17.1 Introduction

6.17.2 Example 1: Adder

6.176.3 Example 2: Multiplier

6.18 Testing the Design: The VHDL Test Bench

6.19 References

6.20 Student Exercises

Chapter 7 Introduction to Digital Signal Processing

7.1 Introduction

7.2 Z-Transform

7.3 Digital Control

7.3.1 Introduction

7.3.2 Digital Controller Example

7.4 Digital Filtering

7.4.1 Introduction

7.4.2 Infinite Impulse Response Filters

7.4.3 Finite Impulse Response Filters

7.5 References

7.6 Student Exercises

Chapter 8 Interfacing Digital Logic to the “Real World”: A/D Conversion, D/A Conversion and Power Electronics

8.1 Introduction

8.2 Digital to Analogue Conversion

8.2.1 Introduction

8.2.2 DAC Characteristics

8.2.3 Types of DAC

8.2.4 DAC Control Example

8.3 Analogue to Digital Conversion

8.3.1 Introduction

8.3.2 ADC Characteristics

8.3.3 Types of ADC

8.3.4 Aliasing

8.4 Power Electronics

8.4.1 Introduction

8.4.2 Diodes

8.4.3 Power Transistor

8.4.4 Thyristor

8.4.5 Gate Turn Off Thyristor

8.4.6 Asymmetric Thyristor

8.4.7 Triac

8.5 Heat Dissipation and Heatsinks

8.6 Operational Amplifiers

8.7 References

8.8 Student Exercises

Chapter 9 Testing the Electronic System

9.1 Introduction

9.2 Integrated Circuit Testing

9.2.1 Introduction

9.2.2 Digital IC Test

9.2.3 Analogue IC Test

9.2.4 Mixed-Signal IC Test

9.3 Printed Circuit Board Testing

9.4 Boundary Scan Test

9.5 Software Test

9.6 References

9.7 Student Exercises

Chapter 10 Systems Level Design

10.1 Introduction

10.2 Electronic System Level Design

10.3 Case Study 1: D.C. Motor Control

10.3.1 Introduction

10.3.2 Motor Control System Overview

10.3.3 MATLAB®/SIMULINK® Model Creation and Simulation

10.3.4 Translating the Design to VHDL

10.3.5 Concluding Remarks

10.4 Case Study 2: Digital Filter Design

10.4.1 Introduction

10.4.2 Digital Filter Overview

10.4.3 MATLAB®/SIMULINK® Model Creation and Simulation

10.4.4 Translating the Design to VHDL

10.4.5 Concluding Remarks

10.5 Automating the Design Process

10.6 Future Directions

10.7 References

10.8 Student Exercises Appendix A Organisations and Standards Appendix B Programmable Logic Device Vendors Appendix C Integrated Circuit Package Types Appendix D Modelling and Simulation Language Summary Appendix E Introduction to the Design Tools E.1 Introduction E.2 4-Bit Adder Design Case Study E.3 Design Entry E.3.1 Starting the Tools E.3.2 Creating a New Project E.3.3 Opening an Existing Project E.3.4 Creating a New Schematic E.3.5 Editing the Schematic E.3.6 Connecting the Symbols E.3.7 Adding Net Names E.3.8 Adding Input and Output Markers E.3.9 Adding Input and Output Cells E.4 Simulating the Design E.4.1 Introduction E.4.2 Creating a VHDL Test Bench E.4.3 Running the Simulation E.4.4 Viewing the Results E.4.5 Closing ISETM E.5 Configuring the CPLD E.5.1 Introduction E.5.2 Package Pin Assignment E.5.3 Implementing the Design E.6 Introductory Guide Exercise Appendix F Case Study PCB Designs F.1 Introduction F.2 System Overview F.3 CPLD Pin Assignments F.4 Connector Pin Assignments F.5 CPLD Development Board F.6 LCD Display and Hex Keypad Board F.7 PC Interface Board F.8 Digital I/O Board F.9 Analogue I/O Board Appendix G Chapter 6 VHDL Code Examples G.1 Introduction G.2 VHDL Code Examples Appendix H Chapter 7 VHDL Code Examples H.1 Introduction H.2 VHDL Code Examples Appendix I Chapter 8 VHDL Code Examples I.1 Introduction I.2 VHDL Code Examples Appendix J Chapter 10 Code Examples J.1 Introduction J.2 Digital PI Controller J.3 CIC Filter Bibliography Index

Digital Systems Design with FPGAs and CPLDs Author Information

By Ian Grout, University of Limerick, Ireland


This product was added to our catalog on Friday 26 December, 2008.

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