The Zeroplus LAP-321000U PC-based logic analyzer features powerful protocol analyzer capabilities. The standard package includes protocol analyzer plug-ins for I2C, UART, SPI, Microwire, SSI, 1-Wire interface, HDQ, CAN, Manchester, and 7-segment LED protocols. For a limited time you get USB1.1 and LIN protocol analyzer plug-ins for free - a US$790 value! The Zeroplus patented waveform compression technology increases the effective memory capacity far beyond the physical 32 Mbits. Twenty-four channels of the LAP-321000U can achieve a compression rate up to 255× depending on the data content, allowing you to obtain considerably more sampling data. The logic analyzer unit features a Start button to begin sampling, and connects to a PC via USB. It supports the full 480Mbps USB 2.0 speed, but also can use 12Mbps USB 1.1. The analyzer is powered from the USB as well. Logic Analyzer Features - Interface: USB 2.0 or 1.1
- Operating System: Windows 98SE/Me/2000/XP/Vista
- Power: via USB
- Channels: 32
- Bandwidth: 75 MHz
- Memory: 32 Mbits
- Memory Depth per channel: 1 Mbit
- Internal Clock Rate (asynchronous): 100 Hz to 200 MHz
- Max. External Clock (synchronous): 100 MHz
 - 5ns glitch capture capability
- Captured data can be printed or written to a TXT file or a CSV file for processing
- Timing/State/Single-processor/Bus/Real-time instruction trace analysis
- Binary/Decimal/Hex display formats provided
- Flexible signal trigger options (rising edge, falling edge, either edge, high and low)
- Trigger Channels: 32
- Trigger Condition: Edge and Pattern
- Selectable trigger position between 100% pre-trigger and 100% post trigger plus up to 16776191 clocks of post-trigger delay
- Trigger Levels: 1
- Trigger Count: 1 to 65535
- Max. Trigger Pages: 8191
- Enable Channels: 32
- Enable: Pattern
- Enable Delay:
- Start: Edge and Pattern
- End: 1 to 65535
- Compression: 24 channels, 1× to 255×
- Operating Voltage: 4.5V to 5.5V (5V typical)
- Static Current Consumption: 200mA max.
- Working Current Consumption: 400mA max.
- Static Power Consumption: 1W max.
- Working Power Consumption: 2W max.
- Data Skew: 1.5 nS max.
- Input Voltage: -30V to +30V
- Reference Voltage: -6V to +6V
- Impedance: 500KΩ/10PF typical
- Operating Temperature: 5°C to 70°C
- Storage Temperature: -40° to +80°C
Package Contents - LAP-321000U logic analyzer unit
- Protocol Analyzer software plug-ins for:
- I2C
- UART
- SPI
- 1-Wire interface
- HDQ
- Microwire
- SSI
- Manchester Code
- 7-segment LED
- CAN Bus
- LIN Bus
- USB1.1
- USB cable
- One 16-channel signal connector
- Two 8-channel signal connectors
- One 2-channel signal connector
- One single-channel signal connector
- 36 test hook grips in 10 different colors (4 ea. color; 2 ea. black & white)
- Software CD-ROM
- Printed User Manual
The included signal connector cables are 25cm in length. A 40cm cable package is available separately. System Requirements - Microsoft Windows 98SE, Me, 2000 Pro SP4, XP, or Vista
- 300 MHz CPU or faster
- 256MB RAM or more
- 100MB available disk space
Downloads Download Logic Analyzer User Manual (PDF file; 7.1 MB) Protocol Bus Analyzer Overview (PDF file; 3.8 MB) Logic Analyzer Software User Interface Overview (PDF file; 4.3 MB) I2C Protocol Analyzer Screenshots
Optional Recommended Products for this Item
|
