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DM3730 DaVinci Digital Media Processor CPU Module US$120.00

DM3730 DaVinci Digital Media Processor CPU Module

The Embest Mini8510 processor card features a Texas Instruments DM3730 DaVinci Digital Media processor which is powered by a 1GHz ARM Cortex-A8 and 800MHz C64x+ DSP core.

The board can be connected to your main board through two 1.27mm spaced, 90-pin, dual row (2x45) male headers. The 16-bit data bus, I/O and all other hardware interfaces can be accessed via these two connectors. The processor card has no software pre-loaded.

You also can purchase this CPU module with a development board and software — see the SBC8100 Plus.

DM3730 DaVinci CPU Board Features

The TI DM3730 DaVinci Digital Media Processor is pin-to-pin compatible with the TI AM3715. Its ARM Cortex-A8 core operates at 1 GHz or can be clocked down to 300, 600 or 800 MHz. The ARM code has 32KB I-Cache, 32KB D-Cache, and 256KB L2 Cache.

The DM3730 also has a TMS320C64x+ DSP code operating at 800 MHz or can be clocked down to 260, 520 or 660 MHz. Other features include a NEON SIMD Co-processor, POWERVR SGX Graphics Accelerator, on-chip 32KB ROM and 64KB shared SDRAM.

The Mini8510 CPU module has the following additional features:

  • 256MB NAND Flash
  • 12-bit Camera interface (30-pin FPC connector, supports CCD or CMOS camera)
  • 1-channel 4-wire JTAG interface (10-pin 1.0mm-pitch connector)
  • 6 LEDs (programmable status LEDs)
  • 2-channel SPI
  • GPMC bus (16-bit data bus, 10-bit address bus, 4 chip-selection signals and several control signals)
  • 3-channel 5-wire UARTs
  • 1-channel ULPI (USB1 HS)
  • Audio in/out
  • 1-channel I2C
  • 2-channel McBSP (McBSP1 and McBSP3, McBSP3 is multiplex with UART2)
  • 2-channel SD/MMC: MMC1 (8-wire), MMC2 (4-wire)
  • 24-bit DSS interface
  • Dimensions: 67 37 mm
  • Operating temperature: -30 to +70 C
  • Humidity range: 20% to 90%
  • Power consumption: 1A @ 3.3V

DM3730 DaVinci CPU Board Pinouts

Main Connectors

Pin Signal Description Pin Signal Description
2G_NOEGPMC Read Enable 2G_D14GPMC data bit 14
3G_NCS7GPT8G_DIRGPMC Chip Select bit 7
PWM or event for GP timer 8
GPMC IO direction control for use with external transceivers
3G_D13GPMC data bit 13
4G_NCS4GPT9DMAREQ1GPMC Chip Select bit 7
PWM or event for GP timer 9
External DMA request 1
4G_D10GPMC data bit 10
5G_NCS6GPT11DMAREQ3GPMC Chip Select bit 7
PWM or event for GP timer 11
External DMA request 3
5G_D8GPMC data bit 8
6G_NCS3DMAREQ0GPMC Chip Select bit 7
External DMA request 0
6G_D9GPMC data bit 9
7GNDGND 7G_D5GPMC data bit 5
8G_WAIT0External indication of wait 8G_D7GPMC data bit 7
9G_NBE0 / G_CLELower Byte Enable. Also used for Command Latch Enable 9G_D3GPMC data bit 3
10G_NATV_ALEAddress Valid or Address Latch Enable 10G_D6GPMC data bit 6
11G_NBE1Upper Byte Enable 11G_D12GPMC data bit 12
12HDQ_SIOBidirectional HDQ 1-Wire control and data 12G_D2GPMC data bit 2
13MMC1_D0MMC/SD Card Data bit 0 13G_D11GPMC data bit 11
14MMC1_D1MMC/SD Card Data bit 1 14G_D1GPMC data bit 1
15MMC1_D2MMC/SD Card Data bit 2 15G_D4GPMC data bit 4
16MMC1_D6/IO128MMC/SD Card Data bit 6 16G_D0GPMC data bit 0
17MMC1_D5/IO127MMC/SD Card Data bit 5 17G_A2GPMC address bit 2
18MMC1_D4/IO126MMC/SD Card Data bit 4 18G_A3GPMC address bit 3
19MMC1_D7/IO129MMC/SD Card Data bit 7 19G_A1GPMC address bit 1
20MMC1_D3MMC/SD Card Data bit 3 20G_A6GPMC address bit 6
21GNDGND 21G_A4GPMC address bit 4
22MMC1_CLKMMC/SD Output Clock 22G_A7GPMC address bit 7
23MMC1_CMDMMC/SD command signal 23G_A5GPMC address bit 5
24VMMC1Power supply for SD/MMC1 (3.0 / 1.8V) 24G_A8GPMC address bit 8
25UART3_RX_IRRXUART3 Receive data, IR and Remote RX 25G_A9GPMC address bit 9
26UART3_CTS_RCTXUART3 Clear To Send, Remote TX 26G_D15GPMC data bit 15
27UART3_TX_IRTXUART3 Transmit data, IR TX 27G_A10GPMC address bit 10
28UART3_RTS_SDUART3 Request To Send, IR enable 28GNDGND
29DSS_ACBIASAC bias control (STN) or pixel data enable (TFT) output 29SPI2_CS1GPT8 SPI Enable 1
PWM or event for GP timer 8
30DSS_VSYNCLCD Vertical Synchronization 30SPI2_CS10GPT11 SPI Enable 0
PWM or event for GP timer 11
31GNDGND 31SPI2_SIMOGPT9 Slave data in, master data out
PWM or event for GP timer 9
32DSS_HSYNCLCD Horizontal Synchronization 32SPI2_CLKSPI Clock
33DSS_CLKLCD Pixel Clock 33SPI2_SOMIGPT10 Slave data out, master data in
PWM or event for GP timer 10
34DSS_D6LCD Pixel Data bit 6 34SPI1_CS3SPI Enable 3
35DSS_D8LCD Pixel Data bit 8 35SPI1_CS0SPI Enable 0
36DSS_D7LCD Pixel Data bit 7 36SPI1_SIMOSlave data in, master data out
37DSS_D9LCD Pixel Data bit 9 37SPI1_SOMISlave data out, master data in
38DSS_D20LCD Pixel Data bit 20 38SPI1_CLKSPI Clock
39DSS_D17LCD Pixel Data bit 17 39GNDGND
40DSS_D16LCD Pixel Data bit 16 40GPIO0GPIO0 / card detection 1
41DSS_D18LCD Pixel Data bit 18 41MMC2_D2 SPI3_CS1MMC/SD Card Data bit 2
SPI Enable 1
42DSS_D10LCD Pixel Data bit 10 42MMC2_D3SPI3_CS0MMC/SD Card Data bit 3
SPI Enable 0
43DSS_D5LCD Pixel Data bit 5 43MMC2_D0SPI3_SOMIMMC/SD Card Data bit 0
Slave data out, master data in
44DSS_D4LCD Pixel Data bit 4 44MMC2_D1MMC/SD Card Data bit 1
45GNDGND 45MMC2_CMDSPI3_SIMOMMC/SD command signal
Slave data in, master data out
46DSS_D2LCD Pixel Data bit 2 46MMC2_CLKSPI3_CLKMMC/SD Output Clock
SPI Clock
47DSS_D3LCD Pixel Data bit 3 47BSP3_DRUART2_RTSReceived serial data
UART2 Request To Send
48DSS_D0LCD Pixel Data bit 0 48BSP3_CLKUART2_TXCombined serial clock
UART2 Transmit data
49DSS_D15LCD Pixel Data bit 15 49BSP3_FSXUART2_RXCombined frame synchronization
UART2 Receive data
50DSS_D11LCD Pixel Data bit 11 50BSP3_DXUART2_CTSTransmitted serial data
UART2 Clear To Send
51DSS_D23LCD Pixel Data bit 23 51GNDGND
52DSS_D22LCD Pixel Data bit 22 52UART1_CTSUART1 Clear To Send
53DSS_D14LCD Pixel Data bit 14 53UART1_TXUART1 Transmit data
54DSS_D19LCD Pixel Data bit 19 54UART1_RXUART1 Receive data
55DSS_D13LCD Pixel Data bit 13 55UART1_RTSUART1 Request To Send
56DSS_D21LCD Pixel Data bit 21 56USB1HS_STPDedicated for external transceiver Stop signal
57DSS_D1LCD Pixel Data bit 1 57USB1HS_D3Dedicated for external transceiver Bidirectional data bus
58DSS_D12LCD Pixel Data bit 12 58USB1HS_D5Dedicated for external transceiver Bidirectional data bus
59GNDGND 59USB1HS_D6Dedicated for external transceiver Bidirectional data bus
60MCBSP1_FSR/IO157Receive frame synchronization 60USB1HS_D7Dedicated for external transceiver Bidirectional data bus
61MCBSP1_CLKR/IO156Receive Clock 61USB1HS_D1Dedicated for external transceiver Bidirectional data bus
62MCBSP1_FSX/IO161Transmit frame synchronization 62USB1HS_D2Dedicated for external transceiver Bidirectional data bus
63MCBSP1_CLKS/IO160External clock input 63USB1HS_D4Dedicated for external transceiver Bidirectional data bus
64MCBSP1_CLKX/IO162Transmit clock 64USB1HS_D0Dedicated for external transceiver Bidirectional data bus
65MCBSP1_DR/IO159Received serial data 65USB1HS_NXTDedicated for external transceiver Next signal from PHY
66MCBSP1_DX/IO158Transmitted serial data 66USB1HS_CLKDedicated for external transceiver 60 MHz clock
68TV_OUTCTV analog output S-VIDEO: TV_OUT2 68USB1HS_DIRDedicated for external transceiver data form PHY
69TV_OUTYTV analog output Composite: TV_OUT1 69SYS_CLKOUT1Configurable output clock 1
70VDD33Power supply for camera (3.3V 500mA) 70LEDALED leg A
71IIC3_SCLI2C Master Serial clock. Output is open drain 71LEDBLED leg B
72IIC3_SDAI2C Serial Bidirectional Data. Output is open drain 72ADCIN0ADC input0 (Battery type)
73IO25General-purpose IO 183 73NRESPWRONPower On Reset
74IO27General-purpose IO 183 74NRESWARMWarm Boot Reset (open drain output)
75BOOTJUMPBoot configuration mode bit 5 75SYSENSystem enable output
77VBUSVBUS power rail (5V, 10mA) 77REGENEnable signal for external LDO
78USB_DNUSB Data N 78ADCIN1ADC input1 (General-purpose ADC input)
79USB_IDUSB ID 79KC0Keypad column 0
80USB_DPUSB Data P 80KC1Keypad column 0
81PWM0Pulse width driver 0 81KC2Keypad column 0
82KR0Keypad row 0 82KC3Keypad column 0
83KR1Keypad row 1 83AUDIO_INAnalog microphone bias 1
84KR2Keypad row 2 84AUDIO_ORPredriver output right P for external class-D amplifier
85KR3Keypad row 3 85AUXRAuxiliary audio input right
86KR4Keypad row 4 86AUDIO_OLPredriver output left P for external class-D amplifier
87VDD18Power supply from TPS65930 (VIO 1.8V) 87GNDGND
88GNDGND 88VBATPower supply (3V - 4.2V 1.5A)
89VDD18Power supply from TPS65930 (VIO 1.8V) 89ON/OFFInput; detects a control command to start or stop the system
90BKBATBackup battery 90VBATPower supply (3V - 4.2V 1.5A)

Other connectors

Camera (FPC Connector)
Pin Signal Description
2D0Digital image data bit 0
3D1Digital image data bit 1
4D2Digital image data bit 2
5D3Digital image data bit 3
6D4Digital image data bit 4
7D5Digital image data bit 5
8D6Digital image data bit 6
9D7Digital image data bit 7
10D8Digital image data bit 8
11D9Digital image data bit 9
12D10Digital image data bit 10
13D11Digital image data bit 11
15PCLKPixel clock
17HSHorizontal synchronization
19VSVertical synchronization
21XCLKAClock output a
22XCLKBClock output b
24FLDField identification
25WENWrite Enable
26STROBEFlash strobe control signal
27SDAIIC master serial clock
28SCLIIC serial bidirectional data
JTAG (1.0 mm pitch)
Pin Signal Description
1VDD181.8V output
2TMSTest mode select
3TD1Test data input
4NTRSTTest system reset
5TD0Test data output
6RTCKReceive test clock
7TCKTest clock
8EMU0Test emulation 0
9EMU1Test Emulation 1

DM3730 DaVinci CPU Board Block Diagram

DM3730 DaVinci CPU Board Resources

Ships from: China
Lead time: 4 weeks

This product was added to our catalog on Tuesday 18 June, 2013.


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