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NXP LPC2294 and LPC2292 are supported, as follows:

LPC2294

Graphical Code Creation Wizards

• A/D converter (ADC)
• Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
• External memory controller
• External interrupts 0, 1, 2 and 3
• Inter-integrated circuit (I2C)
• Memory accelerator
• Phase-locked loop (PLL)
• Ports
• Pulse width modulation (PWM)
• Real-time clock
• Serial peripheral interfaces (SPI0 and SPI1)
• Timers 0 and 1
• Universal asynchronous receiver/transmitters (UART0 and UART1)
• Watchdog timer

Context menu Code Creation Wizards

• A/D converter (ADC)
• Controller area network (Central controller, acceptance filter and CAN1, CAN2, CAN3 and CAN4)
• External memory controller
• External interrupts 0, 1, 2 and 3
• Inter-integrated circuit (I2C)
• Memory accelerator
• Phase-locked loop (PLL)
• Ports
• Pulse width modulation (PWM)
• Real-time clock
• Serial peripheral interfaces (SPI0 and SPI1)
• Timers 0 and 1
• Universal asynchronous receiver/transmitters (UART0 and UART1)
• Vectored interrupt controller (VIC)
• Watchdog timer

Source-level ARM instruction set simulation

Peripheral simulation

• PLL
• Vectored interrupt controller
• Ports
• Timers
• External interrupts
• Universal synchronous/asynchronous receiver/transmitters
• Controller area network
• Watchdog timer

Source-level on-chip debugging with Jaguar USB JTAG interface

LPC2292

Graphical Code Creation Wizards

• A/D converter (ADC)
• Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
• External memory controller
• External interrupts 0, 1, 2 and 3
• Inter-integrated circuit (I2C)
• Memory accelerator
• Phase-locked loop (PLL)
• Ports
• Pulse width modulation (PWM)
• Real-time clock
• Serial peripheral interfaces (SPI0 and SPI1)
• Timers 0 and 1
• Universal asynchronous receiver/transmitters (UART0 and UART1)
• Watchdog timer

Context menu Code Creation Wizards

• A/D converter (ADC)
• Controller area network (Central controller, acceptance filter and CAN1 and CAN2)
• External memory controller
• External interrupts 0, 1, 2 and 3
• Inter-integrated circuit (I2C)
• Memory accelerator
• Phase-locked loop (PLL)
• Ports
• Pulse width modulation (PWM)
• Real-time clock
• Serial peripheral interfaces (SPI0 and SPI1)
• Timers 0 and 1
• Universal asynchronous receiver/transmitters (UART0 and UART1)
• Vectored interrupt controller (VIC)
• Watchdog timer

Source-level ARM instruction set simulation

Peripheral simulation

• PLL
• Vectored interrupt controller
• Ports
• Timers
• External interrupts
• Universal synchronous/asynchronous receiver/transmitters
• Controller area network
• Watchdog timer

Source-level on-chip debugging with Jaguar USB JTAG interface

Go to ARM Development Suite order page